A 3.2 GHz Injection-Locked Ring Oscillator-Based Phase-Locked-Loop for Clock Recovery

An injection-locked ring oscillator-based phase-locked-loop targeting clock recovery for space application at 3.2 GHz is presented here. Most circuits need a very low phase noise and jitter performance are thus based on LC-type oscillators. These excellent performances come the expense of poor integration density. To alleviate this issue, work introduces an PLL circuit. The combination injection-locking process with use oscillators allows benefit while presenting extremely surface area due to architecture without any inductor. injection locking principle addressed, evidence its improvements confirmed through measurement results. Indeed, enhancements up 43 dB 23.3 mUI, respectively, were measured. As intended, shows best density compared recent similar state-of-the-art studies. whole measures 0.1 mm2 consuming 34.6 mW in low-cost 180 nm CMOS technology.